Senior Mixed Signal ASIC Test Engineer

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. How You Will Contribute: As a passionate and innovative ASIC Test Engineer you will develop test solutions for our high-speed mixed-signal ASICs that are critical in enabling Ciena’s new product offerings. You will be responsible for developing test plans, ATE test programs, test methodology, test hardware (via external vendors), product characterization, and supporting the initial production ramp in advance of transfer to volume production testing (OSAT). In this position you will own the test development process from design kick-off through to release to volume production. In contributing to Ciena’s success, you will: Collaborate with ASIC designers and systems teams to translate product requirements into test plans, test cases and procedures which ensure comprehensive ASIC test coverage. Code, bring-up, debug, and maintain reliable wafer-level test programs for mixed-signal ASICs targeting Advantest V93K ATEs based on analog and digital specifications. Optimize test programs to improve yield and reduce overall test times and related costs by improving the efficiency of the testing methods. Investigate low yield results, identify root causes, and implement corrective actions. Work with the fab, assembly, and OSAT to ensure robust manufacturing processes. Identify ASIC specific test hardware requirements for design by external hardware vendors Create and maintain product-related documentation, including test plans, results reports, data summaries, and production release notes. The Must Haves: You are self-driven, taking ownership and demonstrating initiative Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field 5+ years of proven experience in a Test Engineering role including hands-on experience with Advantest V93K ATEs and their various instruments Strong programming background (C++, Java, and Python) Proven expertise in writing and debugging ATE test programs Experience with data analysis software in support of yield reporting and test limit setting Knowledge in testing high-speed datacom integrated circuits (TIAs, Drivers) is highly desirable Strong analytical and debugging skills Excellent organizational, communication, and interpersonal skills Assets: Experience providing requirements for, and working with, test hardware vendors for the development of probe cards, load boards, and sockets Experience with external test equipment such as vector network analyzers and signal generators Experience in supporting reliability trials such as HTOL, LTOL, ESD, LU, etc Strong understanding of semiconductor components (DACs, ADCs, PLLs) Hands-on experience in setting up prober control files Understanding of CP and CPK values and their significance in quality control Experience supporting OSATs for volume testing Enjoy solving complex challenges! The above lists are intended to describe the general nature and level of work. They are not intended to be a comprehensive list of all responsibilities, duties and skills required to be qualified and to be performed by the selected candidate. You will have an opportunity to better understand the role through the interview experience. Pay Range: The annual salary range for this position is $114,000 - $182,000. Job Description How You Will Contribute: As a passionate and innovative ASIC Test Engineer you will develop test solutions for our high-speed mixed-signal ASICs that are critical in enabling Ciena’s new product offerings. You will be responsible for developing test plans, ATE test programs, test methodology, test hardware (via external vendors), product characterizati ... (truncated, view full listing at source)