SoC Modeling Infrastructure Architect
Samsung Research America665 Clyde Avenue, Mountain View, CA, USAPosted 12 March 2026
Job Description
Lab Summary:
The Samsung SoC Architecture Lab explores innovative SoC architecture, key IP blocks (CPU, GPU, NPU), bus / memory subsystem and multimedia subsystems for future Samsung Galaxy products (Smartphones, IoT and future devices) echoing Samsung’s AI for All strategy. We are defining the high performance SoC architecture development for various Galaxy device lineups. This lab collaborates with key RD teams around the globe and Samsung's strategic SoC partners to innovate and reinvent technology that will positively impact hundred-millions of people around the world via the Galaxy flagship products.
Position Summary:
We are looking for a SoC modeling Infrastructure Architect to develop infrastructure for workload breakdown, use case profiling, trace collection and ingestion in models, performance models integration, simulators integration and system level metrics analysis methodologies. Strong coding skills, understanding of mobile SoC, and CPU and Accelerators architecture in general is desired for success for this role.
Position Responsibilities:
Define SoC specification requirements from ideation to Post silicon evaluation, for future Samsung smartphones and tablet and explore tradeoffs to propose innovative architectural optimizations
Perform complex use case breakdown into tasks and explore relevant scheduling schemes as well as mapping to various IP blocks (CPU, GPU, NPU etc.)
Keeping in view the memory and NoC performance, help IP teams integrate the IP models into top level SoC Model
Understand end to end at system level, create infrastructure to correlate with silicon and/or system measured data
Develop the SoC model environment that includes model integration, use case simulation, and debugging
Develop necessary scripts to help speed up debugging and visualization of the metrics collected from SoC model environment
Understand various trace formats and write parsers to convert them into desired formats consumable by modeling tools
Required Skills:
Masters, or PhD in Computer Science/Engineering or equivalent combination of education, training, and experience
8+ years of industry experience related to SoC modeling, performance analysis and system architecture for smartphone or XR products
Understand the role of CPU, memory hierarchy and accelerators for optimizing the system level power and performance for a complex workload
Experience with industry standard performance analysis and modelling tools
Understand various levels of modeling (e.g. analytical, TLM, cycle accurate) and their tradeoffs
Understanding of operating system concepts, especially schedulers
Familiarity with Android and Linux environments, architecture, tracing/logging methodologies and system performance tools/benchmarks
Special Attributes:
Experience with Gem5, RAMulator or another simulator is a plus
Hands-on experience with Synopsis Platform Architect is a big plus
Hands on with development using C/C++/SystemC, Python or TCL scripting is a plus
Our total rewards programs are designed to motivate and engage exceptional talent. The base pay range for roles at this level is listed below, but may be higher or lower in other states due to geographic differentials in the labor market. Within the base pay range, individual rates depend on a number of factors—including the role’s function and location as well as the individual’s knowledge, skills, experience, education and training. This is part of our comprehensive compensation package with annual bonus eligibility and generous benefits to help you live life well. Base Pay Range
$192,300
$264,550 USD
Additional Information
Disclosure of Trade Secrets
Samsung has a strict policy on trade secrets. In applying to Samsung and progressing through the recruitment process, you must not disclose any trade secrets of a current or previous employer.
Essential Job Functions
This position will be performed in an office setting. The position will require the incumbent to sit and s ... (truncated, view full listing at source)
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