Principal BMC Firmware Engineer

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a Principal BMC Firmware Engineer to lead the architecture and development of OpenBMC-based management firmware for hyperscale AI server platforms. This role focuses on building scalable platform management firmware that enables system monitoring, telemetry, power and thermal management, and lifecycle management across large-scale data center deployments. The Team Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. The Firmware Engineering team develops platform management firmware responsible for monitoring, controlling, and servicing Graphcore’s AI compute infrastructure. The team collaborates closely with hardware engineering, silicon teams, platform architects, and validation teams to deliver reliable firmware across server and rack-scale systems. Responsibilities and Duties Lead the architecture and development of OpenBMC firmware for hyperscale server platforms. Enable hardware integration including power management, sensors, FRU inventory, and device management. Develop scalable manageability interfaces using D-Bus, Redfish, PLDM, and MCTP protocols. Architect firmware security capabilities including Root of Trust, secure boot chains, and measured boot. Design firmware lifecycle management frameworks including multi- component firmware updates with rollback protection. Develop telemetry and observability pipelines for fleet-scale monitoring and diagnostics. Collaborate with silicon vendors and ODM partners from architecture through manufacturing ramp . Contribute to OpenBMC upstream projects and relevant industry standards. Mentor engineers and promote best practices in Yocto builds, CI/CD pipelines, and automated testing. Lead system-level debugging across hardware and firmware in lab and production environments. Candidate Profile Essential Bachelor’s or Master’s degree in Electrical Engineering , Computer Engineering, Computer Science, or equivalent experience. 10+ years of experience developing BMC firmware for server or data center platforms. Strong expertise with OpenBMC including D-Bus services, Yocto / BitBake , and platform integration. Strong programming skills in C/C++ and scripting languages such as Python or Bash. Experience with platform management protocols including Redfish, PLDM, SPDM, MCTP, and IPMI. Strong understanding of server hardware architecture including power delivery, thermals, sensors, and FRUs. Experience with hardware interfaces such as I²C, I3C, SPI, and PCIe. Experience building CI/CD pipelines for firmware development and validation. Strong debugging skills using tools such as JTAG, GDB, and logic analyzers. Desirable Experience developing OpenBMC for ARM-based server platforms in hyperscale environments. Hands-on contributions to the OpenBMC codebase or upstream community. Experience working with ODM/JDM partne ... (truncated, view full listing at source)