Senior Embedded & FPGA Systems Engineer
ZividOslo, NydalenPosted 24 March 2026
Job Description
Senior Embedded & FPGA Systems Engineer
ABOUT US
Zivid is one of Norway’s most ambitious technology companies, building advanced 3D vision systems for the global robotics market. Our 3D cameras serve as the eyes of robots, enabling automation in manufacturing and logistics worldwide.
With nearly 100 employees, offices in six countries, and a rapidly growing international customer base, Zivid is shaping the future of machine vision and robotic automation.
We are now looking for a Senior Embedded & FPGA Systems Engineer to help develop the core firmware and hardware acceleration that powers the next generation of Zivid 3D cameras.
JOB DESCRIPTION
As a Senior Embedded & FPGA Systems Engineer at Zivid, you will work at the heart of our camera platform, developing high-performance embedded firmware and contributing to FPGA-based processing systems.
Most of the work in this role focuses on embedded firmware development in C/C++, where you will design and implement the low-level systems responsible for communication, real-time data flow, and system control inside the camera.
At the same time, our camera architecture relies on tight integration between firmware and FPGA logic to achieve high throughput and low latency. The ideal candidate enjoys working close to hardware and is comfortable contributing to FPGA development in collaboration with the rest of the team.
Today, FPGA development is handled by a small number of engineers, and you will help strengthen this capability while collaborating closely with hardware, optics, and software teams across the company.
You will work on challenging problems such as high-throughput sensor pipelines, FPGA-accelerated image processing, and low-latency data transfer between the camera and host systems.
ABOUT THE ROLE
Design and implement high-performance embedded firmware in C/C++
Develop and optimize low-latency data pipelines between sensors, FPGA logic, and host systems
Work with high-speed data transfer and networking technologies
Contribute to FPGA-based processing pipelines
Help determine how functionality should be distributed between firmware, FPGA, and host software
Participate in the bring-up and integration of new camera platforms
Evaluate system architecture choices affecting performance, latency, and resource usage
Improve reliability, debuggability, and maintainability of embedded systems
This is a high-impact role where you will help shape the core architecture and performance of future Zivid cameras.
WE’RE LOOKING FOR
7+ years of experience in embedded software development, preferably with real-time systems
Strong C++ and/or C programming skills and deep understanding of low-level system design
Solid experience with hardware/software integration, debugging on embedded targets, and performance optimization
Experience developing high-performance or real-time embedded systems
Experience working with or contributing to FPGA-based systems
IT'S A PLUS IF YOU HAVE
Experience with FPGA-based systems (Verilog, VHDL, or HLS)
Experience with embedded operating systems or RTOS
Experience with high-speed networking or data transfer technologies (e.g., RDMA, PCIe)
Familiarity with camera or image sensor interfaces (e.g., MIPI, CSI, SLVS-EC)
Experience working with hardware-accelerated processing pipelines
Education:
University degree in Computer Science, Software Engineering, or a related field
Personal qualities:
Strong troubleshooting and problem-solving skills
Enjoy working close to hardware in cross-disciplinary engineering teams
Passion for building high-performance, reliable systems
WE OFFER
Competitive compensation package, including sign-on stock options, competitive pension scheme and premium health insurance plan
Focus on code quality and learning: Tech talks, pet-project hackathons, code reviews, design reviews, and peer programming
High-end developer workstations and freedom to choose OS and IDE
A software team dedicated to quality, testin ... (truncated, view full listing at source)
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