Silicon Packaging Design Engineer

Job Details: Job Description: As a Silicon Packaging Design Engineer, you will play a pivotal role in driving the development of advanced substrate designs, contributing to the creation of cutting-edge technology that fuels Intel's innovation. You will be responsible for the end-to-end development of substrate designs, from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability. This position provides an exciting opportunity to work collaboratively with silicon and hardware teams, directly impacting Intel's success in delivering world-class solutions for high-performance applications. Key Responsibilities Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements. Perform substrate fit and routing studies to establish design, performance, and cost tradeoffs. Define and implement substrate design rules, conducting internal and external reviews to ensure designs meet quality standards. Analyze data, resolve Design Rule Checks (DRCs), and optimize package designs for manufacturability and performance. Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions. Complete documentation and collateral into the product lifecycle management system of record. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications Bachelors with 1 years of experience or master’s degree with 6 months of experience in Electrical Engineering, Mechanical Engineering, or Material Sciences disciplines. 6 months of experience with the following technical skills: Experience and/or familiarity with microelectronic package or PCB physical layout design and manufacturing process. Familiarity with package design tools like Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks. Familiarity with physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversion. Preferred Qualifications: Experience in microelectronic package substrate design, package I/O routing, and/or technology development. Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS. Strong analytical ability and problem-solving skills, including debugging and providing creative solutions. Experience with package design tools such as Package Layout Automation (PLA) and FIELD. Experience with scripting using Python, VB, C, or similar languages. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, ... (truncated, view full listing at source)