LTD BE Etch Module Development Engineer
IntelUS, Oregon, Hillsboro$115k – $163kPosted 27 March 2026
Job Description
Job Details:
Job Description:
In this role, you will be an integral contributor to next‑generation patterning process development and First‑of‑Kind (FOK) tool installation, development, and qualification . You will work in a dynamic, collaborative environment solving complex technical problems on sophisticated manufacturing processes and equipment while partnering closely with cross‑functional stakeholders.
Note: This role requires regular onsite presence to fulfill essential job responsibilities.
Key Responsibilities (may include but are not limited to)
Support FOK tool install , bring‑up, development, and qualification activities for Back End Etch modules.
Contribute to the development of next‑generation patterning processes ; execute learning cycles from early development through qualification.
Work with cross‑functional teams (e.g., Integration, Manufacturing, Equipment, Yield/Defect, and suppliers) to solve technical process and defect issues.
Plan and conduct experiments (e.g., DOE) to characterize process performance throughout the development cycle.
Establish and improve process control systems to optimize and sustain production performance (e.g., SPC, control plans, response plans).
Drive improvements in quality, reliability, cost, yield, process stability/capability, productivity, and safety/ergonomics within the module scope.
Develop structured strategies to resolve difficult problems and help implement mechanisms to prevent recurrence (sustaining systems, standard work, controls).
Behavioral Traits (Ideal Candidate)
Demonstrated ability to analyze complex technical issues and identify a clear solution path.
Self‑directed, shows initiative, and can work independently with minimal direction.
Strong communication skills; can summarize complex data sets for both technical and non‑technical audiences.
Collaborative mindset and comfort working across multiple teams and priorities.
Qualifications:
Minimum Qualifications:
Master’s degree in Chemical Engineering, Materials Science, Physics, Electrical Engineering, Mechanical Engineering, Chemistry, or related STEM field.
Experience (academic research, internship, or industry) with semiconductor process development, manufacturing, equipment engineering, or related experimental work.
Experience planning and executing experiments and analyzing data (e.g., JMP, Python, SQL, MATLAB, Excel).
Willingness and ability to work onsite regularly to support tool and process development needs.
Preferred Qualifications:
Hands‑on cleanroom/fab experience.
Familiarity with etch process fundamentals, defect/yield problem solving, and/or process controls (SPC/DOE).
Experience collaborating with cross‑functional teams and documenting technical learnings.
Primary Location
US, Oregon, Hillsboro
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and ... (truncated, view full listing at source)
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