Senior Principal Engineer – AI Applied Research

Intel
US, Oregon, Hillsboro$293k – $414kPosted 27 March 2026

Job Description

Job Details: Job Description: The Role and Impact: Are you ready to shape the future of artificial intelligence application to high-risk high-reward problems in Logic IP Design and its co-optimization with semiconductor manufacturing process, to make a large impact to outcomes? As Senior Principal Engineer in AI Applied Research, you will drive strategic advancements in AI applications to high-priority technical problems. In this role, you will lead efforts to develop transformative solutions through AI models. You will partner with IP design and manufacturing process development teams to identify high impact problems, develop innovating solutions through modeling, test/iterate and implement them to show tangible business value. This is a leadership role requiring significant influence with partners throughout the journey and with modeling teams in developing novel models. You will be at the forefront of pushing boundaries in application of deep learning, machine learning, reinforcement learning, natural language processing, graph neural networks, time-series, etc. Your expertise will help align technical vision with organizational goals, pushing the limits of power-performance-area-cost advantage of new technology node offerings by Intel. As a domain expert, you will mentor technical leaders, foster collaboration, and serve as a trusted advisor across organizations. Join us to inspire change and play a pivotal role in driving Intel's success. Key Responsibilities: Conduct applied research to invent and adapt AI methods for solving complex business problems. Develop proof-of-concept models and implement them to demonstrate tangible business value. Perform in-depth literature reviews to identify state-of-the-art AI techniques and methods. Lead technical strategy formulation to deliver leadership solutions aligned with organizational goals. Serve as a domain expert, influencing technical direction and fostering innovation across Intel and the industry. Mentor and develop technical leaders, exemplifying Intel values and strengthening the community. Collaborate across teams to solve group-level problems and drive relentless execution of transformative AI solutions. Qualifications: Minimum Qualifications: Ph.D. in STEM and 15 years of experience. 10 years of experience in Logic IP design and/or Design Technology Co-Optimization 10 years of expertise in algorithm research and development, deep learning models, and applied AI techniques. 6 years of proficiency in programming languages such as Python, R, etc. and with AI tools, frameworks, and platforms, including TensorFlow, PyTorch, or similar. Multiple instances of successfully executing diverse strategic projects in parallel from research through implementation, delivering impactful results. Multiple instances of influencing partner organizations, engineers through executives, in aligning to high business value problems and solutions Preferred Qualifications: Detailed knowledge of wafer processing in the fab Strong communication skills with the ability to articulate complex ideas effectively. Experience in coaching, mentoring, and growing technical leaders. Proven track record of fostering collaboration within diverse, cross-functional teams, and influencing partners at all levels - from engineers to senior executives. Demonstrated leadership in aligning technical vision with business objectives. Passion for driving innovation, coupled with a commitment to Intel's values of trust and integrity. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply cha ... (truncated, view full listing at source)
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