Member of Technical Staff, Research Engineer (GPU Performance)
RunwayRemote$270k – $370kPosted 27 March 2026
Job Description
Member of Technical Staff, Research Engineer (GPU Performance)
We are building AI to simulate the world through merging art and science.
We believe that world models are at the frontier of progress in artificial intelligence. Language models alone won’t solve the world’s hardest problems – robotics, disease, scientific discovery. Real progress requires models that experience the world and learn from their mistakes, the same way that humans do. And this kind of trial and error can be massively accelerated when done in simulation, rather than in the real world.
World models offer the most clear path to general-purpose simulation, changing how stories are told, how scientific progress is made and how the next frontiers of humanity are reached.
Our team consists of creative, open minded, caring and ambitious people who are determined to change the world. We aspire to continuously build impossible things and our ability to do so relies on building an incredible team. If you are driven to do the same, we'd love to hear from you.
ABOUT THE ROLE
We’re looking for Research Engineers to help our world models train faster and run more efficiently, without compromising what they can do. You will profile, optimize, and rearchitect the systems that turn research ideas into models that run at scale and in real time — directly shaping what is computationally possible and, by extension, what capabilities we can build.
WHAT YOU’LL DO
- Optimize training throughput across large GPU clusters — improving MFU through custom kernels, mixed-precision strategies (FP8, BF16), memory-efficient attention, and activation checkpointing
- Design and maintain distributed training infrastructure: tensor parallelism, context parallelism, FSDP, and fault-tolerant multi-node setups
- Profile and accelerate inference pipelines for real-time multimodal generation — CUDA graph compilation, KV cache optimization, operator fusion, and latency reduction
- Optimize and scale our training infrastructure to improve efficiency and reliability
- Contribute to the entire stack, from low-level kernel optimizations to high-level model design
WHAT YOU’LL NEED
- 4+ years of experience in systems engineering, ML infrastructure, or performance optimization for deep learning
- Familiarity with GPU kernel development (CUDA, Triton, CUTLASS) and distributed systems (NCCL, collective communication, model parallelism)
- Experience with ML framework internals (PyTorch, JAX) and mixed-precision / low-precision techniques (FP8, INT8)
- Experience building and operating large-scale training infrastructure, including fault tolerance and cluster orchestration
- Excitement about building AI that simulates the world — and making it performant enough to run in real time
- Bonus if you have experience with torch’s compilation feature
Runway strives to recruit and retain exceptional talent from diverse backgrounds while ensuring pay equity for our team. Our salary ranges are based on competitive market rates for our size, stage and industry, and salary is just one part of the overall compensation package we provide.
There are many factors that go into salary determinations, including relevant experience, skill level and qualifications assessed during the interview process, and maintaining internal equity with peers on the team. The range shared below is a general expectation for the function as posted, but we are also open to considering candidates who may be more or less experienced than outlined in the job description. In this case, we will communicate any updates in the expected salary range.
Lastly, the provided range is the expected salary for candidates in the U.S. Outside of those regions, there may be a change in the range, which again, will be communicated to candidates.
Salary range: $270,000-$370,000
Runway strives to recruit and retain exceptional talent from diverse backgrounds while ensuring pay equity for our team. Our salary ranges are based on competitive ... (truncated, view full listing at source)
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