DSP Engineer, Satellites (Starlink)

SpaceX
Redmond, WA$125k – $145kPosted 30 March 2026

Tech Stack

Job Description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. DSP ENGINEER, SATELLITES (STARLINK) The Starlink Space Lasers team develops, produces, and deploys the most cutting-edge satellite free-space optical communication systems in the world. We are looking for engineers to contribute to the development of laser communications terminals and imaging products for the groundbreaking constellation of Starlink satellites. All SpaceX optical systems (laser communication terminal and other optical products) require a blend of theoretical expertise, practical implementation skills, and a passion for solving complex problems in real-time, resource-constrained systems. As a DSP engineer on the Starlink Space Laser team, you will work with a team of Optical engineers, DSP engineers, software engineers, hardware engineers and end users to shape the future of laser communication systems and directly contribute to mission-critical applications in low earth orbit and beyond. You will work in a highly collaborative and fast-paced environment. RESPONSIBILITIES: Drive program-level decisions on firmware and software designs Research novel solutions for large-scale, long-distance free space and fiber optic communication systems Design and test algorithms for on-orbit and ground-based data processing Work in close collaboration with FPGA, RF/antenna, and software engineers to design and validate communication systems Perform on-orbit demonstrations and testing System-level and link-level design in support of spacecraft communications and sensing systems Develop floating-point and fixed-point models and run simulations to analyze and validate overall system performance, including modem performance Own the end-to-end results of your products, from requirements gathering through production and flight, including verification and documentation BASIC QUALIFICATIONS: Bachelor’s degree in computer science, computer engineering or electrical engineering and 1+ years of experience in digital signal processing engineering; or 3+ years of professional digital signal processing engineering experience in lieu of a degree 1+ years of experience designing and verifying modems and sensors 1+ years of experience developing signal processing algorithms in Python, Matlab, or C/C++ 1+ years of experience in system-level modeling and/or digital signal processing PREFERRED SKILLS AND EXPERIENCE: Master’s degree in electrical engineering with emphasis in communication systems or digital signal processing Expertise modeling with both floating-point and fixed-point signal processing algorithms in Python, Matlab, or C/C++ Experience in coherent digital demodulation of waveforms such as GMSK, BPSK, QPSK, QAM, PCM/FM, APSK, OFDM, including spread spectrum Experience developing firmware for Xilinx FPGA platforms using the Xilinx toolchain, or STM32 Experience with verification between simulation and RTL FPGA implementation Experience modeling RF and Optical and channel impairments such as multipath, phase noise, group delay, fading and nonlinear distortion Understanding of RF and Optical concepts such as AGC, noise figure, power amplifiers, phase noise, PLL, oscillators/mixers Understanding of RF and Optical link budgets and noise analysis, intermodulation analysis, and trade-offs of frequency conversion topologies Familiarity with test equipment such as spectrum analyzers and signal generators Excellent communication and documentation skills, and ability to collaborate with other engineering disciplines ADDITIONAL REQUIREMENTS: Extended hours and weekend work may be required to support critical project and mission milestones COMPENSATION AND BENEFITS: Pay range: Software Engineer/Level I: $125,000.00 - $145,000.00/per year ... (truncated, view full listing at source)
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