Advanced Technology Compiler Engineer

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Team The Advanced Technology Group (ATG) is Cerebras ’ pathfinding organization. We work ahead of product to explore new architectures, demonstrate breakthrough performance on scientific and AI workloads, and shape the technical roadmap for future Cerebras hardware and software. Our work regularly appears at top venues (Supercomputing, SIAM, IEEE, and NeurIPS ) and directly influences the design of next-generation wafer-scale systems. About The Role We are seeking Compiler Engineers to join a small team of specialists working on our emerging Tungsten language compiler. Tungsten is Cerebras’ dataflow programming language, purpose-built for wafer-scale hardware. You will work on the Tungsten compiler from language design through code generation, building the toolchain that translates high-level intent into efficient execution across hundreds of thousands of cores with a memory and interconnect model unlike anything in conventional computing. This is not incremental work on an existing backend. The architecture is new, the programming model is new, and the compiler is where those two things meet. You will collaborate closely with Cerebras’ ASIC, kernel, and AI teams, and your design decisions will directly shape both the language and the hardware it targets. Beyond the compiler itself, the broader toolchain—runtime, debugger, simulator—is still being built, and we are equally interested in engineers who want to own those pieces of the developer experience on novel hardware. Responsibilities Design and implement compiler passes across the Tungsten toolchain: mid-end optimization, backend code generation, instruction scheduling, register allocation, assembler, and linker. Co-design language constructs that improve expressiveness and performance for dataflow execution on wafer-scale hardware. Develop and iterate on code generation strategies for complex scientific and AI workloads, analyzing performance bottlenecks and closing the gap between peak and achieved throughput. Extend the compiler to support future hardware architectures as they move from design to silicon. Work directly with ASIC architects and application researchers to inform hardware-software co-design decisions. Skills Qualifications PhD in Computer Science or Computer Engineering preferred ; exceptional candidates without a graduate degree who demonstrate equivalent depth through published research, significant open-source contributions, or a strong industry track record are encouraged to apply. Substantial experience in compiler development: IR design, optimization passes, code generation, or backend implementation for novel or non-standard architectures. Strong grasp of computer architecture: instruction sets, memory models, dataflow execution, and how hardware constraints shape compilation ... (truncated, view full listing at source)