Silicon Packaging Design Engineer

Job Details: Job Description: As an integral part of Intel's new Integrated Device Manufacturer 2.0 (IDM2.0) strategy, we are establishing Foundry Services (FS), a fully vertical, stand-alone foundry business, reporting directly to the CEO. Foundry Services will be a world-class foundry business and major provider of US and European based capacity to serve customers globally. Foundry Services will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IPs. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. Silicon packaging engineering responsibilities include: Drives end-to-end development for mask and panel design from concept through tape out for a given package to produce within the substrate factory. Implements physical layout and routing of the panel design and may help with routing the package. Performs panel substrate fit studies to establish design, performance, and cost tradeoffs. Conducts internal and external reviews, analyzes data, and resolves DRCs to optimize panel design. Completes documentation and collateral into the product lifecycle management system of record. Qualifications: You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor’s degree in electrical engineering or related field with 6 months of relevant experience. Relevant experience must include at least one of the following areas: Valor, Cadence APD, Siemens Xpedition, or CAD software, and readiness to troubleshoot a wide variety of physical design/layout issues. Prior experience with physical layout aspects of substrate design/layout including but not limited to custom layouts, floor plans, or schematic layout conversion. Preferred Qualifications: Performing panel routing starting day one. Strong analytical ability and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions. Microelectronic package substrate technology development. Scripting using Python, VB, C, and/or other language Job Type: College Grad Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, Oregon, Hillsboro Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender ... (truncated, view full listing at source)