Senior Design Reliability Engineer
K2 SpaceLos Angeles, CA$140k – $175kPosted 2 April 2026
Job Description
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and US government customers – we’re mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today’s and tomorrow’s massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization.
If you are a motivated individual who thrives in a fast-paced environment and
you're
excited about contributing to the success of a groundbreaking Series C
space startup,
we’d
love for you to apply.
The Role
You will ensure that every K2 spacecraft is designed, documented, and verified using rigorous, standardized processes that consistently meet requirements and deliver exceptionally reliable flight systems. You will own and continuously improve the design reliability framework for our spacecraft, driving the creation, enforcement, and evolution of design standards across the engineering organization.
You will lead development of K2’s design review processes, review templates, configuration management practices, and design verification standards, ensuring that each design iteration adheres to high-reliability principles and is validated in a consistent, traceable manner. You will exercise formal design review signoff authority and serve as a key technical gatekeeper during development.
As production begins, you will guide a disciplined handoff to Build Reliability, ensuring that manufacturing and test teams inherit well‑documented, fully verified designs. This role is ideal for a systems-minded engineer who thrives on structure, rigor, and enabling teams to build high-powered hardware right the first time.
Responsibilities
Develop and maintain standardized design review processes, including templates, workflows, and review structures
Serve as a design review signoff authority, ensuring all designs meet internal and customer requirements and reliability criteria before release
Establish, document, and enforce comprehensive design and verification standards across engineering
Define and manage design configuration management practices to ensure controlled, traceable design evolution
Drive consistency in requirement interpretation, verification methods, and documentation across all engineering teams
Partner with engineering leads to ensure designs are completed in a standard, verified fashion aligned with program requirements
Lead and participate in cross-disciplinary reviews to evaluate design readiness, compliance, and verification closure
Provide structured and complete design handoffs to Build Reliability as programs transition into production
Ensure production and flight lessons learned are systematically captured and incorporated into future design iterations to drive continuous improvement and reliability growth
Establish and enforce standardized processes for acceptance and qualification testing to ensure consistent, repeatable, and requirements‑compliant execution
Operate effectively in a rapidly evolving startup where agility, autonomy, and proactive problem-solving are essential
Qualifications
Bachelor’s degree in electrical, aerospace, mechanical, computer, or other relevant engineering discipline
4+ years of experience in ... (truncated, view full listing at source)
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