Power Analysis and Optimization Engineer

Job Details: Job Description: Do Something Wonderful! Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and have a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Who We Are Become part of the cutting-edge CPU microprocessor design team focused on innovating high performance and low power microprocessor solutions. The CPU team has a strong history of fast paced IPC growth coupled with extreme efficiency excelling in high performance per Watt per unit area microprocessors. Our processor designs service a wide variety of products including desktops, servers, laptops, and numerous other product families. Who You Are This role is in the Silicon Engineering Group as a Power Analysis and Optimization Engineer. Your responsibilities will include, but not limited to: Working cross-functionally with design and architecture teams to define targets and convergence methodology. Identifying opportunities for power optimization in existing design, and new power saving features. Defining power optimization solutions and driving optimizations that advance the state of art in power and efficiency. Designing, developing, and executing power plans for the CPU. Conducting feature and workload analysis from power standpoint and driving to close any gaps between observed behavior and targets on CPUs in development. Providing recommendations for future architecture. Developing and enhancing innovative flows for power analysis. Ensuring CPUs are optimized for power. Qualifications: You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications The candidate must have a bachelor's degree in electrical/computer engineering, and/or computer science with 4 years of experience -OR- Master's degree in electrical/computer engineering and/or computer science with 3 years of experience -OR- a PhD in electrical/computer engineering and/or computer science At least 4 years of experience in dynamic and leakage power estimation and reduction at architecture/RTL/block synthesis and circuit design level. Preferred Qualifications Master's degree in electrical/computer engineering and/or computer science with 3 years of experience; OR a PhD in electrical/computer engineering and/or computer science with 2 years of experience in the following: Proficiency with industry-standard power estimation tools. Automation skills in a scripting language. Broad understanding of the overall CPU architecture. Chip/CPU level understanding required on power consumption, power estimation and low power design methods. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Texas, Austin Additional Locations: Business group: The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, ... (truncated, view full listing at source)