Senior Emulation Engineer

Job Details: Job Description: Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. The Role: This senior Emulation Engineer candidate will development and enable Accelerator IPs in Intel platforms by implementing and debugging complex hybrid models of SOCs, chiplet dies and the IP's for pre and post Silicon Validation and debug purposes. The candidate will be engaged with Design, Architecture, FW/SW, driver development team and more to develop design models for validation and verification. In this position your responsibilities may include: Create FPGA and Hybrid FPGA emulation models from RTL using FPGA synthesis, partitioning and routing tools. Define and develop new capabilities and HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon functional validation as well as SW development/validation. Define and document RTL changes required for emulation. Develop hardware collateral to be integrated with the FPGA emulation model. Test and debug the FPGA emulation model. Develop and maintain model build flows, debug capabilities Support continuous integration of model builds. Support Software and Validation team with model use. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences. Minimum Qualifications: Minimum Requirement includes a Bachelor's and 6 years or Master's and 5 years in Electrical/Electronic Engineering, Computer Engineering, Computer Science or Communications and Electronic Engineering. 4 years in the following: RTL coding proven capabilities Lab environment and debug skills FPGAs and Emulation Preferred Qualifications: Linux experience as an admin or end user Knowledge of Wireless and Networking Protocols Knowledge of PCIE Scripting languages such as TCL, Perl Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, California, Santa Clara, US, Oregon, Hillsboro, US, Texas, Austin Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the ... (truncated, view full listing at source)