Rust SW-Silicon Co-verification Engineer

Matx
Mountain View, CAPosted 14 April 2026

Tech Stack

Job Description

What MatX Is Building MatX is seeking engineers with strong Rust skills to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. You will write Rust tests that verify our software models and hardware design behave identically and match the specification. Your tests and tooling will exercise the chip's software model and hardware design side by side, catching mismatches before they become silicon bugs. If you've ever wished your knack for writing correct, thorough Rust could be applied to something where correctness has million-dollar consequences, this is the role for you. You do not need prior hardware or verification experience to apply — if you know Rust, we will teach you the hardware side. What You'll Do Here Write Rust tests that verify our software models and hardware design agree with each other and with the specification Build test infrastructure in Rust that makes it easy to add new tests and run them at scale Develop and maintain harnesses that connect your tests to our hardware Write tests that systematically explore corner cases and rare event sequences — both targeted tests and tests that use randomization to find surprises Work with architects and design engineers to turn specifications into concrete, testable properties Who You Are Proficient in production Rust — you've shipped real systems. You're comfortable with ownership, traits, generics with bounds, and enums as sum types. You understand why Result is better than exceptions and what the borrow checker is actually protecting you from Strong engineering fundamentals — you write clean, well-tested, well-documented code and are comfortable with build systems, version control, and CI workflows Comfortable with low-level systems concepts: memory layout, concurrency, bit manipulation Genuinely interested in hardware and willing to ramp quickly on chip verification This is a hybrid role that will require you to work from our Mountain View, CA office 3 days a week on Tuesday through Thursday Bonus Points If You Have Experience with hardware in any capacity — FPGA projects, embedded systems, robotics, or prior roles touching hardware engineering Experience with foreign function interfaces — Rust FFI is ideal, but any experience crossing language boundaries is valuable Experience with Bluespec (BH or BSV) Formal methods, model checking, or property-based testing (e.g., proptest, Kani) Understanding of computer architecture: pipelines, caches, memory hierarchies, on-chip interconnects What We Offer A Stake in our success A cash/equity mix that fits your needs and option to do early exercise Health Wellness Company subsidized Health, Dental, Vision, and Life insurance; Pre-tax Health Savings Accounts with generous company contribution (even if you don’t) Time To Recharge 4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year Support to Parents Up to 12 weeks of paid parental leave, regardless of your path to parenthood Learning Development $1,500 yearly towards your professional development e.g. conferences, courses, and other learning opportunities Team Connection Team Lunches, quarterly off-sites, and regular town halls Financial Wellbeing 401K and/or Roth IRA, with 5% company contribution, even if you don’t! Flexible Spending Accounts Pre-tax spend accounts for medical, dental/vision, dependent care, parking, and transit expenses Commute On Us For those commuting up to 1 hour, put your rideshare cost on our company card and reclaim the drive-time to get work done! MatX E[x]tras $50 per month to use on the perks you care about most Remote Perks We work remotely Monday Friday, supported by home-tech setup, and remote wifi expense reimbursement As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not disc ... (truncated, view full listing at source)
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