SOC Design Verification Engineer

Job Details: Job Description: The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring the functional integrity of Intel's integrated System-on-Chip (SoC) designs. This position directly impacts Intel's ability to deliver cutting-edge solutions by validating complex architectural and microarchitectural features and ensuring compliance with design specifications. You will collaborate across disciplines to verify designs at the block, subsystem, and full SoC levels, driving innovation and improving the quality of Intel's products. This role is essential in pushing technological boundaries and ensuring Intel remains a leader in the industry. Key Responsibilities Conduct functional logic verification of SoC designs to ensure they meet design requirements and specifications. Develop scalable and reusable verification plans, test benches, and environments for blocks, subsystems, and the entire SoC to meet coverage requirements. Execute verification plans using emulation and system simulation models to validate design functionality, analyze performance metrics, and uncover bugs. Debug issues within the presilicon environment, identify root causes, and implement corrective measures effectively. Collaborate with architects, RTL developers, and design teams to enhance verification of complex SoC features and drive technical reviews of test plans and proofs. Integrate security activities within test plans to ensure comprehensive security coverage. Maintain and improve functional verification infrastructure and methodologies. Analyze insights from post-silicon validation to update test plans, close coverage gaps, and proliferate learnings to future product developments. Demonstrated ability to drive continuous improvement in test suites and methodologies. A passion for innovation and collaboration, contributing to Intel's mission to push technological boundaries and deliver impactful solutions. Apply now to join Intel's dynamic team and shape the future of technology. Qualifications: Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Science, or a related field with 8 years of industry experience or Master's degree in Electrical Engineering, Computer Science, or a related field with 6 or more years of industry experience or PhD in Electrical Engineering, Computer Science, or a related field with 4 or more years of industry experience. Proficiency in OVM/UVM methodologies and System Verilog-based constrained random verification. Experience in developing and executing verification test plans, including debugging and coverage closure. Proficiency in scripting languages to facilitate automation. Preferred Qualifications Experience with security or coherency or SoC verification. Extensive experience in design and/or design verification for complex IPs or SoCs. Comprehensive understanding of the verification lifecycle, from architecture to execution and coverage closure. Robust validation and debugging skills, with self-reliance in resolving issues with internal and external teams. Experience in Xeon CPU Pre-Silicon or Post-Silicon Validation. Expertise in cache coherency principles for multi-processor SoCs and layered protocols such as transaction layer, data link layer, and PHY layer. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Colorado, Fort Collins, US, Oregon, Hillsboro Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opp ... (truncated, view full listing at source)