Senior / Engineer, Process Engineering (Advanced Packaging)

Assembly
SingaporePosted 16 April 2026

Tech Stack

Job Description

Step into a career with ASM, where cutting edge technology meets collaborative culture. ​ For over 55 years ASM has been ahead of what’s next, at the forefront of innovation and what’s technologically possible. With more than 4,500 ASMers representing 70 nationalities, our people and our advanced semiconductor devices are playing a crucial role in trends such as 5G, cloud computing, AI, and autonomous driving.  But we’re more than just a tech company. We value diversity, inclusion and sustainability as we strive to make a positive impact on the world. Our development programs help support your growth, shaping your future and pushing the boundaries of innovation to unleash potential. Job's mission Build the foundation of next ‑ generation semiconductor technologies. As a Senior / Engineer, Process Engineer ing in Advanced Packaging, you will start your engineering career at the heart of semiconductor innovation. Working alongside experienced engineers and scientists, you will help develop, optimize , and characterize thin ‑ film and surface preparation processes that enable future chip technologies. This role is designed to help you grow—from learning the fundamentals to gradually taking ownership of process modules that directly impact customer success and product performance. What you will be working on Support the development and optimization of semiconductor processes for advanced packaging applications, including thin ‑ film deposition (ALD, PECVD, PVD, ECP) and surface preparation Assist with planning and executing experiments, applying structured problem ‑ solving and basic DOE concepts Collect, analyze, and document experimental data to support process learning and improvement Develop new films or processes for emerging packaging applications like hybrid bonding and perform advanced materials characterization. Perform hands ‑ on work with process equipment under guidance, including basic troubleshooting and tool characterization Collaborate with cross ‑ functional teams such as equipment engineering, applications, and RD to support process integration Contribute to technical documentation, reports, and internal knowledge sharing Learn and apply safe working practices in laboratory and cleanroom environments What we are looking for Ph. Ds or Master's in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or a related field. Bachelor’s with strong research background can be considered. Academic, internship, or project experience in semiconductor processing, materials science, or microelectronics Familiarity with at least one thin ‑ film deposition or process technique (e.g., ALD, CVD, PECVD, PVD, electrochemical processes) through coursework or lab work Exposure to hybrid bonding concepts, surface preparation, or integration topics through academic projects Basic understanding of experimental methods, data analysis, or statistical concepts Exposure to materials or surface characterization techniques through university labs or projects (e.g., SEM, AFM, XRD, ellipsometry) Strong curiosity, learning mindset, and willingness to develop hands ‑ on technical skills Ability to communicate clearly and work effectively in a collaborative, multicultural environment What sets you apart Internship, co ‑ op, or thesis experience related to semiconductor manufacturing or advanced packaging Experience writing technical reports or presenting project results Interest in working closely with complex equipment and understanding how processes translate to customer applications Motivation to grow into deeper technical ownership and future engineering leadership Apply today to be part of what’s next. We make the tech that enables the chips in devices which improve lives around the world. We do this with an eye to the future, pushing the boundaries of what’s possible through cutting-edge innovation, and driving the next wave of technological breakthroughs that shape how we liv ... (truncated, view full listing at source)
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