Director, Hardware Engineering | Photonics IC, SERDES, EIC, PIC, High Speed Wireline | 15+ years, Bangalore

Director of Engineering – India Site Lead Meet the Team The Director of Engineering will lead the India Team in Bengaluru & Pune within Cisco’s Client Optics Group (COG) Silicon Engineering Org. This role is responsible for setting the high-performance silicon engineering team in Bengaluru & Pune and driving the end-to-end execution of optical transceiver development for COG’s silicon-photonics–based transceiver chipsets and modules. Key responsibilities include planning, architecture, development, simulation, diagnostics, bring-up, and validation of electronics and silicon photonics ICs (EICs & PICs). A significant new focus for this role is the deployment of AI tools, when possible, to enhance productivity, quality, and development cycle times. Your Impact Product Planning Evaluating Marketing Requirements Documents (MRDs) and providing timely responses as to the approach, timeline, and feasibility for new product concepts. Significant participation in Cisco’s product lifecycle (PLC) process including Concept Commits (CCs), Engineering Commits (ECs) and other important PLC milestones. Working with the COG Program Management Team to develop and maintain accurate, detailed, and comprehensive program schedules and resource plans. Drive adoption of AI tools to enhance productivity, quality, and development speed. Silicon Development Oversee the design, development, delivery, and documentation of electronics ICs, and chipsets by working closely with the team in the US, various team leaders to guarantee execution with predictability, velocity and quality. Ensure India Silicon team is following best engineering practices in the development, physical design, custom layout, simulation, validation/characterization, SI/PI & documentation of the optical transceiver designs being developed. Apply analytics and AI/ML to stimulate edge cases, optimize test strategies, and improve test coverage, usability, debug capabilities, and fault isolation. Collaboration & Team Development Partner with the Silicon Engineering team in the US, Platform Engineering, Product Management, and Operations teams to ensure multi-functional alignment and successful program delivery. Foster a collaborative, innovative, accountable, and inclusive culture, promoting guidelines and knowledge sharing across global teams. Mentor and develop high-performing teams, emphasizing continuous learning in silicon development and effective use of AI-assisted development tools. Minimum Qualifications 15 years high-speed electronics and photonics development leadership experience including management of global teams. Mixed signal/analog electronics: Drivers, TIAs, ADCs, TX/RX Equalizers, CDRs, etc. Digital signal processors (DSP) and Optical / Photonic ICs: Modulators, Photo Detectors, Grating Couplers, Waveguides, etc. High-speed SERDES – 112Gbps, 224Gbps PAM4/PAM6, and Signal & power integrity, channel modeling. Advanced packaging including fine-pitch and low-parasitic chip-chip interconnect, PLL / clock domains and distribution, and Power distribution. Silicon diagnostics, test coverage, and DFT, Electrical, optical, and co-simulation applications and tools, and Silicon validation and test equipment. Advanced degree (Master’s/PhD) in Electrical/Computer Engineering, Physics, or related field with a focus on semiconductor and/or optics development. Preferred Qualifications Advanced understanding of silicon manufacturing processes, and automation Optical transceiver silicon and module architecture definition at 200Gbps/lane, 400Gbps/lane Good understanding of MSA standards such as QSFP/QSFP-DD and IEEE 802.3 ethernet specifications. Strong communication, global team management, and executive presence. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together ... (truncated, view full listing at source)