Hardware Engineering Technical Leader

Cisco
2 LocationsPosted 28 April 2026

Tech Stack

Job Description

Meet the Team Our team is dedicated to ensuring end-to-end product reliability across surface mount technology (SMT), printed circuit board (PCB) design, materials, and system-level thermal solutions for high-speed platforms including Server, Networking, and AI systems. We collaborate closely with cross-functional teams and suppliers to drive failure resolution and design optimization, leveraging data, physics, and engineering judgment. The team is composed of experienced engineers who thrive in a dynamic environment focused on innovation and reliability. What excites us most is owning the full thermal stack and its impact on product reliability, making a critical difference in cutting-edge technology performance. Your Impact In this role, you will own the end-to-end product reliability, focusing on SMT, PCB design, materials, and system-level thermal solutions. You will drive failure resolution and design optimization through data analysis, physics understanding, and engineering judgment, with full ownership of the thermal stack components such as TIM1/TIM2, heatsink, and airflow. You will define and execute system-level validation plans, perform PCB design reviews, and lead root cause analysis and corrective actions. Success means delivering reliable, optimized designs that meet stringent thermal and reliability requirements, ensuring product longevity and performance. Responsibilities Define and execute system-level validation plans covering SMT, PCB, and thermal performance Perform PCB design and layout reviews to identify reliability and thermal risks Validate designs against signal integrity (SI), power integrity (PI), electromagnetic interference (EMI), thermal, and manufacturability requirements Own thermal stack definition and validation, including TIM1/TIM1.5/TIM2 material selection and interface optimization, heatsink design, mounting pressure, and contact quality Execute thermal validation under steady-state and transient conditions Analyze thermal performance and its impact on reliability Partner with thermal teams to optimize heat dissipation, airflow, system impedance, and advanced cooling solutions (liquid cooling is a plus) Lead root cause analysis across design, SMT process, materials, and thermal conditions Drive corrective actions such as solder alloy and joint optimization, edge bond/underfill implementation, PCB layout and pad design improvements, and thermal interface and cooling solution optimization Develop lifetime models using Weibull analysis and statistical methods Evaluate thermal impact on product life cycle and failure modes Define and maintain validation methodologies and guidelines Minimum Qualifications Bachelor’s degree or above in Electrical, Mechanical, Materials Science, or related field 10 years of experience in SMT, PCB, reliability, or system thermal engineering Strong experience in SMT processes and solder joint reliability Experience in PCB design review Solid understanding of thermo-mechanical behavior and failure mechanisms Preferred Qualifications Hands-on experience in failure analysis and corrective actions Experience in system-level thermal validation and cooling solutions Strong cross-functional communication skills Experience with server, data center, or AI systems Experience in multi-vendor validation and second-source qualification SiOps Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow an ... (truncated, view full listing at source)
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