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Senior Engineer, Wafer Quality Assurance

Western Digital
San Jose, CAPosted 4 August 2026

Job Description

ESSENTIAL DUTIES AND RESPONSIBILITIES AI Platform Change Control & Quality Assurance: Serve as the quality gatekeeper for AI platform changes. Develop a deep understanding of system interdependencies, drive requirements gathering (including testing and verification protocols), and collaborate closely with wafer operations partners to ensure seamless, quality-compliant implementations. End-to-End Wafer Quality Program Support: Support the full lifecycle of wafer quality initiatives, including Change Review Board (CRB) margin projects and Material Review Board (MRB) processes, ensuring consistent quality standards from start to finish. Agentic AI Development for Quality Operations: Design and build Agentic AI solutions with autonomous decision-making capabilities for Incoming Quality Assurance (IQA) and Outgoing Quality Assurance (OQA) processes across wafer operations. Failure Mode & Effects Analysis (FMEA): Lead and facilitate FMEA activities across IT and wafer systems to proactively identify, assess, and mitigate potential failure modes and their impact on quality and reliability. REQUIRED Bachelor's degree in Engineering, Computer Science, Data Science, or a related technical field (Master's preferred) 3+ years of experience in quality assurance, quality engineering, or a related role within semiconductor or wafer manufacturing Working knowledge of AI/ML platforms and an understanding of change control processes in production environments Experience with or exposure to Agentic AI, LLM-based systems, or intelligent automation frameworks Familiarity with FMEA methodology and its application to IT and manufacturing systems Strong cross-functional collaboration skills with the ability to engage both technical and operations teams Excellent analytical and problem-solving skills with a detail-oriented mindset SKILLS Excellent communication and presentation skills Experience with end-to-end quality management in semiconductor manufacturing Hands-on experience developing AI agents or decision-automation tools (e.g., using Python, LangChain, or similar frameworks) Salary Range:  81,000.00-108,000.00 Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the " Know Your Rights: Workplace Discrimination is Illegal ” poster. Our pay transparency policy is available here . Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfu ... (truncated, view full listing at source)
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