IC Package Engineer (Starlink/Akoustis)

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. IC PACKAGE ENGINEER (STARLINK/AKOUSTIS) Akoustis is now operating as a wholly owned subsidiary of SpaceX, providing industry leading RF filters using patented XBAW technology to help drive the mission of making human life multi-planetary and connecting the world through Starlink. We design, build, launch, and operate the world's largest constellation of satellites, enabling us to operate a global internet network unbounded by traditional ground infrastructure limitations. The root of SpaceX’s success so far lies in our mission to keep all engineering and production in-house, which enables a tight feedback loop, nimble decision-making, and speedy deliverables. With millions of daily users worldwide already online, Starlink is truly a game-changer and levels the playing field for those who were previously unconnected. We are looking for a highly skilled and motivated IC Package Engineer to lead the development, qualification, and implementation of advanced integrated circuit (IC) packaging solutions. In this role, you’ll play a critical part in enabling high-reliability, high-performance electronics for cutting-edge applications. You will work cross-functionally with design, manufacturing, reliability, supply chain, and failure analysis teams to deliver optimized semiconductor packaging that meets stringent thermal, mechanical, and electrical requirements. The ideal candidate will bring hands-on experience in semiconductor packaging, materials science, and electronics manufacturing processes, with a passion for technical innovation and attention to detail. RESPONSIBILITIES: Design, develop, and qualify IC packaging technologies including flip-chip, wire bonding, wafer-level packaging (WLP), QFN, CSP, and LGA Evaluate and select packaging materials (substrates, mold compounds, underfills, adhesives) based on thermal, mechanical, and electrical properties Drive thermal management strategies within packages, including simulation and implementation of heat dissipation techniques Define and execute reliability test plans (e.g., thermal cycling, uHAST, HTOL) for qualification of package designs Utilize EDA/CAD tools (e.g., AutoCAD) for mechanical layout, with experience in ANSYS or other simulation tools as a plus Apply DFM methodologies to ensure manufacturability, reliability, and testability from concept through production Provide technical guidance for IC assembly and packaging processes, including SMT, die attach, reflow, wire bonding, underfill, and encapsulation Conduct and support failure analysis investigations using tools like X-ray, SEM, FIB, and cross-sectioning to drive root cause and corrective actions Perform root cause analysis and data-driven troubleshooting using tools such as FMEA, SPC, and Six Sigma methodologies Collaborate with PCB and substrate design teams to ensure co-design compatibility and package-board integration Own project timelines, risks, and deliverables related to packaging initiatives and report progress to key stakeholders BASIC QUALIFICATIONS: Bachelor’s degree in mechanical Engineering, packaging Engineering, materials science, electrical Engineering, or or other engineering discipline 1+ year of experience designing, qualifying, or implementing IC packaging solutions (internships and academic projects are applicable) PREFERRED QUALIFICATIONS: 2+ years of hands-on experience with semiconductor packaging technologies, including: Flip-chip, wire bond, WLP, LGA, CSP, QFN Organic/inorganic substrates and PCB manufacturing Deep understanding of packaging materials and their thermal, mechanical, and electrical properties Familiarity with thermal management techniques for power-dense or mission-critical ... (truncated, view full listing at source)