Formal Verification Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a Formal Verification Engineer at Tenstorrent, you will be at the forefront of applying advanced formal verification methods to thoroughly verify intricate CPUs and chiplets. This role involves driving the formal verification strategy, mentoring engineers, and fostering cross-team collaboration to uphold rigorous quality standards and functional specifications. Your direct contributions will be vital to developing groundbreaking technologies and ensuring their seamless and efficient operation. This role is hybrid, based out of Santa Clara, CA, Austin, TX, or Bangalore, IN. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A formal methods practitioner who enjoys pushing the boundaries of formal methods to solve difficult verification problems. Demonstrated experience in applying formal methods to sign off designs or sub-components of designs. Detail-oriented with a desire to overcome complex challenges. Comfortable collaborating across design, microarchitecture, and verification teams to identify subtle logic bugs. Possess strong communication and excellent interpersonal skills for effective team collaboration. What We Need Lead with 5+ years of hands-on experience in formal methods applied to hardware verification. B.S. or M.S. (or higher degree) in Computer Engineering, Electrical Engineering, or Mathematics with 5+ years of relevant work experience. Strong background and hands-on experience with formal methods and their application to hardware, software, or systems. Hands-on experience with VLSI, digital logic design, and verification techniques. Knowledge of digital logic is required. Proficiency in temporal logic assertion-based languages like SVA or PSL. Experience using EDA formal tools such as Jasper, VC-Formal, Questa, or Yosys for property checking and formal regression. Tool development experience is a plus. What You Will Learn Leverage formal verification algorithms and techniques to prove correctness and identify bugs in design specifications and RTL for high-performance CPUs and chiplets. Collaborate with architects to develop formal micro-architecture and architectural specifications for intricate designs, including crafting innovative solutions for complex challenges. Prove the robustness of complex design micro-architectures. Architect correct-by-construction design methodologies to enhance formal verification efficiency and productivity and contribute to the evolution of formal methodologies. Apply artificial intelligence techniques to improve specifications, formal methods applications, and formal verification. Contribute to cross-functional product development across CPU, AI, and interconnect domains, and with partners. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due t ... (truncated, view full listing at source)