Advanced Packaging Technologist & Lead

<div class="content-intro"><p><span data-contrast="none">Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. </span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559685":0,"335559737":240,"335559738":240,"335559739":240,"335559740":279}"> </span></p> <p>Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. <a href="https://openai.com/index/cerebras-partnership/">OpenAI recently announced a multi-year partnership with Cerebras</a>, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. </p> <p>Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.</p></div><p><strong><span data-contrast="none">Advanced Packaging Technologist Lead</span></strong><span data-ccp-props="{"201341983":0,"335559740":276}"> </span></p> <p><span data-contrast="none">We are seeking an accomplished </span><strong><span data-contrast="none">Advanced Packaging Technologist Lead</span></strong><span data-contrast="none"> to drive the development, integration, and deployment of next‑generation semiconductor packaging technologies. This role is critical in architecting and implementing advanced, high‑performance, and high‑density packaging solutions supporting cutting‑edge compute, AI, and heterogeneous integration platforms.</span><span data-ccp-props="{}"> </span></p> <p><strong><span data-contrast="none">Key Responsibilities</span></strong><span data-ccp-props="{}"> </span></p> <p><strong><span data-contrast="none">Advanced Packaging Architecture Development</span></strong><span data-ccp-props="{}"> </span></p> <ul> <li data-leveltext="" data-font="Symbol" data-listid="5" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="none">Design and implement advanced semiconductor packaging technologies, including </span><strong><span data-contrast="none">2.5D/3D stacking, heterogeneous integration</span></strong><span data-contrast="none">, high-bandwidth interconnects, and advanced power-delivery architectures.</span><span data-ccp-props="{"335559739":0}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="5" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="2" data-aria-level="1"><span data-contrast="none">Lead RD in </span><strong><span data-contrast="none">Chip-on-Wafer (CoW)</span></strong><span data-contrast="none"> and </span><strong><span data-contrast="none">Wafer-to-Wafer (W2W)</span></strong><span data-contrast="none"> bonding approaches for high-density integration.</span><span data-ccp-props="{"335559739":0}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="5" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="3" data-aria-level="1"><span data-contrast ... (truncated, view full listing at source)