Senior Failure Analysis Engineer (Reliability Test Team)
AstranisSan FranciscoPosted 10 March 2026
Tech Stack
Job Description
Astranis builds advanced satellites for high orbits, expanding humanity’s reach into the solar system. Today, Astranis satellites provide dedicated, secure networks to highly-sophisticated customers across the globe— large enterprises, sovereign governments, and the US military. With five satellites on orbit and many more set to launch soon, the company is servicing a backlog of more than $1 billion of commercial contracts. Astranis is the preferred satellite communications partner for buyers with stringent requirements for uptime, data security, network visibility, and customization. Astranis has raised over $750 million from some of the world’s best investors, from Andreessen Horowitz to Blackrock and Fidelity, and employs a team of 450 engineers and entrepreneurs. Astranis designs, builds, and operates its satellites out of its 153,000 sq. ft. headquarters in Northern California, USA.
Senior Failure Analysis Engineer (Reliability Test Team)
As a Senior Failure Analysis (FA) Engineer, you will be embedded within our verification and validation development cycle, performing hands-on investigation of hardware failures coming directly out of test environments, qualification experiments, and design verification activities. You will work at the front of the product lifecycle; providing rapid, actionable root-cause findings that feed directly back into active design iterations. You will be the primary technical owner of understanding why prototype hardware fails, translating physical evidence into design, process, and supplier improvements that accelerate our path to reliable production hardware.
Role
Perform failure analysis investigations on Printed Circuit Board Assemblies (PCBAs), components, modules, and subsystems returned from environmental, electrical, and mechanical cycling test campaigns
Troubleshoot and isolate failures using drawings, schematics, circuit tracing, fault isolation techniques, and Design of Experiments (DOE) where appropriate
Apply analytical techniques including optical and digital microscopy, X-ray/Computed Tomography (CT), mechanical cross-sectioning, curve tracing, and thermal imaging to identify failure mechanisms at the sub-system, board, and component level
Coordinate with external analytical laboratories for advanced techniques such as Scanning Electron Microscopy / Energy Dispersive Spectroscopy (SEM/EDS), Fourier-Transform Infrared Spectroscopy (FTIR), and Focused Ion Beam (FIB) analysis when deeper characterization is required
Author concise technical FA reports with documented findings, images, and conclusions that support design review discussions
Translate physical failure evidence into clear, actionable root-cause conclusions and corrective action recommendations
Collaborate with design, reliability, quality, manufacturing, and test engineering teams to drive corrective actions and prevent recurrence across prototype iterations
Support Failure Modes and Effects Analysis, Design Verification, Validation, and Qualification planning and with proactive FA insights and risk identification based on lessons learned from previous builds
Identify and flag failure patterns related to PCB/PCBA assembly, Surface Mount Technology (SMT) soldering processes, and supplier quality issues to inform Design for Quality and Reliability
Build and maintain a failure database to capture institutional knowledge and enable trend analysis across prototype builds
Establish and continuously improve FA processes, workflows, and documentation standards appropriate for a fast-moving prototype environment
Requirements
Bachelor’s degree in Electrical Engineering, Materials Science, Electronic Engineering Technology, Mechanical Engineering or a related field
5+ years of hands-on failure analysis experience on electronic hardware (PCBAs, motors, batteries, components, interconnects)
Background in a prototype or New Product Introduction (NPI) environment with rapid iteration cycles
Proficiency with standard ... (truncated, view full listing at source)
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