Module Development Engineer
IntelUS, Oregon, Hillsboro$134k – $255kPosted 27 March 2026
Job Description
Job Details:
Job Description:
TD Module Development Engineers are responsible for leading scientific research enabling the manufacture of innovative device architectures but not limited to:
Drives technology development and enablement for both high volume manufacturing and future technology, provides process integration and equipment solutions, and performs feasibility studies to meet desired device specifications
Leads design and development of technically sophisticated manufacturing processes and/or repair reverse engineering including material selection, parameter optimization, equipment metrology, and system design to enable new product designs and functional requirements
Performs pathfinding activities in support of process and hardware development enabling manufacturing of innovative device architectures, and develops roadmaps for technologies enabling future roadmap
Recommends and implements modifications for operating equipment to improve production efficiency, manufacturing techniques, and optimizing production output for existing products
Partners with key equipment and materials suppliers to develop and implement enabling elements of the technology
Performs process technology feasibility studies through theoretical simulations and/or practical engineering methods
Remains updated on relevant industrial process and material manufacturing technical trends and develops view of inherent future Intel process technology needs to push industry forward by partnering with vendor ecosystem to build cost sensitive roadmap
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:
Bachelors degree in Materials Science, Chemical Engineering, Chemistry, Physics, Electrical Engineering, or a related Scientific STEM (Science Technology Engineering Math) field of study with 4 years of Semiconductor Industry experience (semiconductor processing and semiconductor fabrication)
OR
Masters degree in Materials Science, Chemical Engineering, Chemistry, Physics, Electrical Engineering, or a related Scientific STEM field of study with 3 years of Semiconductor Industry experience (semiconductor processing and semiconductor fabrication)
OR
PhD degree in Materials Science, Chemical Engineering, Chemistry, Physics, Electrical Engineering, or a related Scientific STEM field of study with 1 years of Semiconductor Industry experience (semiconductor processing and semiconductor fabrication)
Preferred Qualifications:
5 years of experience in one of the following areas (more than one is preferred):
Semiconductor and transistor device physics
Advanced transistor device structures and architectures including fabrication (Atomic Layer Deposition, Chemical Vapor Deposition, Rapid Thermal Annealing, Ion Implantation, Surface treatments and modification) with in-depth knowledge of semiconductor device physics and process integration
Semiconductor processing fundamentals (lithography, wet etch, dry etch, chemical and or mechanical polishing, etc.)Design of experiments
Expertise in Materials and physical device characterization (SEM, TEM, etc.) and fundamentals of semiconductor device testing
Experience with using inline advanced metrology for materials characterization
Process control systems, methodologies, sources of variability, and statistics
Experience leading projects and cross-functional teams encompassing qualifications listed above
For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locat ... (truncated, view full listing at source)
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