IP Design Verification Engineer

Job Details: Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position. The IP Design Verification Engineer is responsible for performing functional verification of IP logic to ensure designs meet defined specification and microarchitecture requirements. This role includes developing verification strategies, executing simulation models, debugging pre‑silicon issues, and collaborating closely with architecture, design, and physical design teams to ensure high‑quality, robust IP delivery. The position may also include technical leadership responsibilities within the verification team. Key Responsibilities Serve as a validation team lead, providing technical guidance within the Memory Controller IP verification domain to local team members. Perform functional verification of Memory Controller IP logic to ensure designs meet specification requirements. Develop IP verification plans, test benches, and verification environments to ensure coverage and conformance to microarchitecture specifications. Execute verification plans and define, run, and analyze system simulation models to verify design functionality, analyze power and timing, and uncover design bugs. Replicate, root cause, and debug issues in the pre‑silicon verification environment. Identify and implement corrective actions to resolve failing tests and verification gaps. Collaborate closely with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Document test plans and drive technical reviews of verification plans and results with design and architecture teams. Maintain and enhance existing functional verification infrastructure and methodologies. Participate in the definition of verification infrastructure and related TFMs required for functional design verification. Use AI tools such as Copilot to enhance productivty of both individual contributions and teammates. Behavioral Traits Technical Leadership: Demonstrates ownership of verification strategy and provides technical guidance and mentorship to junior engineers and peers. Analytical and Detail‑Oriented: Approaches complex verification challenges methodically, with strong attention to detail in debugging, root‑cause analysis, and coverage closure. Proactive Problem Solver: Anticipates verification risks early, identifies gaps in plans or infrastructure, and drives corrective actions without waiting for escalation. Collaboration Skills: Works effectively across architecture, RTL, physical design, and validation teams to resolve complex architectural and microarchitectural issues. Clear Communicator: Articulates technical concepts, verification results, and risks clearly in written documentation, reviews, and cross‑functional discussions. Ownership and Accountability: Takes full responsibility for verification quality, timelines, and deliverables, ensuring issues are driven to resolution. Adaptable and Resilient: Thrives in a fast‑paced, evolving design environment and adjusts quickly to changing priorities, specifications, and project needs. Continuous Improvement Mindset: Actively contributes to improving verification methodologies, infrastructure, best practices, and team processes. Quality‑Focused: Maintains a strong commitment to design correctness, robustness, and silicon readiness across all phases of the product lifecycle. Qualifications: Minimum qualifications are required to be initially considered for this position.  Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's or Master's degree in Computer Science, Computer Engineering, Electronics Engineering or a related field. 6 years of industry experi ... (truncated, view full listing at source)