RTL Design & Micro-Architecture Engineer

Job Details: Job Description: This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position. We are seeking a highly skilled RTL designer and Micro-Architect to work on the design and development of cutting-edge technologies for the next generation of scalable data centers to support the increased demand for high-performance computing and AI workloads. This role involves architecting and implementing advanced digital hardware that drives future compute platforms while collaborating closely with cross-functional teams to ensure performance, power, and efficiency targets are met. Key Responsibilities Develop the logic design, register transfer level (RTL) coding, and simulation for SoC designs. Integrate logic from IP blocks and subsystems into full chip SoC or discrete component designs. Participate in defining architecture and microarchitecture features for designed blocks. Perform quality checks across RTL to ensure timing, power convergence, and design integrity. Write and optimize RTL code to meet power, performance, area, and timing goals. Troubleshoot failing RTL tests and apply corrective measures to ensure design correctness. Collaborate with IP providers to integrate and validate IPs at the SoC level. Collaborate with Physical Design teams on logic synthesis and timing constraints Behavioral Traits Problem ‑ Solving Mindset: Approaches complex technical challenges with curiosity, creativity, and structured analytical thinking. Collaboration Skills: Works effectively with cross ‑ functional engineering teams, seeks input from partners, and communicates clearly in both technical and non ‑ technical contexts. Adaptability and Learning Agility: Quickly learns new tools, technologies, and methodologies; comfortable working in evolving development environments. Attention to Detail: Delivers high ‑ quality, reliable, and scalable software solutions with a focus on robustness, validation, and secure coding practices. Results ‑ Oriented: Prioritizes effectively, manages time well, and drives solutions to completion in a fast ‑ paced engineering environment. Innovation and Continuous Improvement: Looks for opportunities to optimize tools, simplify workflows, and introduce new methodologies that enhance engineering efficiency. Qualifications: Minimum qualifications are required to be initially considered for this position.  Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. Minimum of 3 years of experience with a Bachelor's degree, 2 years with a Master's degree, or no prior experience required with a PhD. Experience should be in the following areas: RTL design and coding using System Verilog. Digital design fundamentals and microarchitecture principles. Simulation tools and methodologies (VCS, QuestaSim, etc ...). Verification workflows. Advanced English level. Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship). Preferred Qualifications: Demonstrated ability to collaborate across IP and cross-functional teams. Experience optimizing designs for power, performance, and area targets. Knowledge of UVM basics. SoC system architecture and microarchitecture. Logic synthesis, timing analysis, and SDC. AXI/APB interfaces. IP Design and Integration. We are looking for talented individuals who are eager to contribute to Intel's mission of creating world-changing technology. Take this opportunity to shape the future of computing by joining our team today. Job Type: Experienced Hire Shift: Shift 1 (Mexico) Primary Location: Mexico, Guadalajara Addit ... (truncated, view full listing at source)