TA/Chief of Staff for CEG
Intel3 Locations$198k – $330kPosted 27 March 2026
Job Description
Job Details:
Job Description:
The CEG Technical Assistant/Chief of Staff is a high-impact leadership role supporting the Central Engineering Group's (CEG) strategic initiatives. This position serves as a trusted advisor and operational leader, driving cross-functional collaboration, strategic planning, and organizational excellence across Intel's engineering ecosystem. The role offers exceptional exposure to senior leadership and accelerated professional development opportunities.
Key Responsibilities
Strategic Support & Leadership
• Drive business decision-making processes and ensure successful execution of strategic objectives
• Serve as a key liaison between CEG and partner organizations across Intel
• Lead organizational sensing activities to identify priorities, gaps, and opportunities
• Collaborate with other Chiefs of Staff and senior executives globally
Operational Excellence
• Manage executive scheduling, staff meetings, and day-to-day operational execution
• Create high-quality collateral materials for internal and external stakeholders
• Drive special projects and cross-functional initiatives within CEG
• Establish and optimize business processes to enhance organizational effectiveness
• Coordinate with support functions (HR, Finance, Legal) on planning and reviews
Stakeholder Management
• Build and maintain strong relationships across CEG and partner organizations
• Facilitate communication and alignment between engineering teams and business units
• Represent CEG leadership in cross-functional forums and strategic discussions
• Drive stakeholder relationship management initiatives
Key Success Factors
• Adaptability: Thrive in a fast-paced, rapidly evolving technical environment
• Discretion: Handle sensitive information with utmost confidentiality and judgment
• Results Orientation: Drive measurable outcomes and strategic impact
• Technical Credibility: Earn respect from engineering teams through technical understanding
• Global Perspective: Work effectively across time zones and cultural boundaries
• Resilience: Maintain composure and clarity in high-stress, high-stakes situations
Qualifications:
Minimum Requirements
• Bachelor's degree in Engineering, Computer Science, Business, or related technical field
• 10 years of progressive business experience, preferably in technology industry
• Proven track record of high performance and significant accomplishments at Intel
• Strong understanding of Intel's products, technologies, and business strategies
• Experience working across multiple engineering disciplines and business functions
Technical & Business Acumen
• Deep knowledge of semiconductor industry trends and competitive landscape
• Understanding of engineering development processes and product lifecycle management
• Strong analytical and critical thinking capabilities
• Excellent program management skills with experience delivering complex, global initiatives
Leadership & Communication Skills
• Exceptional written and verbal communication abilities
• Proven ability to synthesize complex technical information into clear, actionable insights
• Strong networking and relationship-building capabilities
• Experience coaching and influencing senior leaders and technical teams
• Demonstrated ability to work effectively under pressure and ambiguity
Preferred Qualifications
• MBA or advanced degree in Engineering/Technology Management
• Background in engineering leadership or technical program management
• Experience supporting C-level executives or senior technical leaders
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Additional Locations:
US, California, Folsom, US, California, Santa Clara
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silic ... (truncated, view full listing at source)
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