Lab Engineering Technician

Intel
US, Oregon, Hillsboro$55k – $103kPosted 3 April 2026

Tech Stack

Job Description

Job Details: Job Description: As a Lab Engineering Technician, you will play a pivotal role in advancing Intel's innovation by supporting our Advanced Design Lab team. Your contributions will ensure the seamless operation of a cutting-edge environment dedicated to enabling the characterization of high-performance device and circuit characteristics. By maintaining lab functionality, resolving technical issues, and ensuring precision in testing and documentation, you will directly influence the quality and reliability of Intel's groundbreaking technologies. This position offers an exciting opportunity to collaborate with talented engineers and technicians in a dynamic and fast-paced setting, fostering growth and technical expertise while making meaningful contributions to Intel's success. Key Responsibilities: Manage and maintain the lab environment to ensure optimum functionality and organization. Perform electrical, mechanical, and software troubleshooting to diagnose and resolve issues with lab equipment. Deploy, monitor, and triage automated tests, ensuring consistent and accurate results. Design, develop, and maintain customized equipment, fixtures, and testing protocols to meet precise requirements. Support the physical setup, configuration, and validation of prototype systems and peripheral devices. Monitor inventory levels, restock supplies, and maintain accurate inventory reports and logs. Develop and update technical documentation, including test specifications, standard operating procedures, and qualification test plans. Conduct preventive maintenance and maintain a clean, well-organized lab space conducive to efficient operations. Collaborate with cross-functional teams to identify and implement robust solutions to technical challenges. Ensure adherence to quality standards and record test results with precision and attention to detail. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Knowledge and/or experience listed below would be obtained through a combination of your school, work and/or classes and/or research and/or relevant previous job and/or internship experiences.  This position is not eligible for Intel immigration sponsorship. Minimum Qualifications: High School diploma with 3 years of relevant experience, or AA/AS degree with 2 of relevant experience, or Bachelor's degree in electronics, electrical engineering, or a related field. Strong hands-on practical experience in Microsoft Office tools (Excel, PowerPoint, Word, etc.) Experience in equipment maintenance, troubleshooting, or testing methodologies. Experience working with Technical and Procedural documentation. Preferred Qualifications 3 years of experience with DC or RF wafer probers. Exceptional organizational skills with a demonstrated passion for cleanliness and intuitive lab management. Strong collaboration, facilitation, and communication skills to effectively work in team-oriented environments. Ability to dive into technical details and synthesize complex information for problem-solving and documentation. Join our team of innovators and contribute to shaping the future of semiconductor technology. Apply today to be part of a supportive and forward-thinking environment that values creativity, precision, and collaboration. Job Type: Tech Grad Shift: Shift 7 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to adv ... (truncated, view full listing at source)
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