Senior CPU Power Management Architect

Job Details: Job Description: The Role and Impact As a CPU Power Management Architect, you will be at the forefront of Intel's innovation, shaping the future of CPU designs for high-performance computing and low-power products. This role is integral to Intel's mission to deliver cutting-edge solutions that power the world's technology, from advanced data centers to everyday consumer devices. You will play a pivotal role in driving end-to-end CPU Power management architecture specifications, ensuring optimal performance, power efficiency, scalability, and interoperability across hardware and software. Through creative problem-solving and collaboration, you will influence cross-functional roadmaps, define technology targets, and deliver revolutionary CPU architectures that meet diverse market requirements. Key Responsibilities Define end-to-end CPU power management microarchitecture, including the design and specification of hardware mechanisms for dynamic voltage and frequency scaling (DVFS), power state transitions (C-states and P-states), thermal control, hotspot detection and mitigation, droop mitigation, ICCMAX enforcement, reset flow architecture, Machine learning algorithms for power and performance, power delivery and power gating techniques, as well as telemetry and debug capabilities. Explore new approaches and devise novel power management and thermal management solutions that deliver optimized CPUs for multiple segments, from high-performance computing to extreme low-power applications. Identify emerging market trends and translate them into novel features. Collaborate with RTL designers, SoC architects, and firmware/OS teams to ensure power management algorithms are implemented correctly and interface seamlessly with software. Review and influence cross-functional roadmaps and collaborate with architects, design, verification, and validation engineers during project execution. Participate in the post silicon debug and tuning of silicon. You will compare real-world power/performance data against your pre-silicon models to close the gap between theoretical projections and actual hardware results. Expertise in CPU architecture fundamentals, microarchitecture design, low-power design, RTL development, and System Verilog. Proven ability to debug microarchitecture and simulation issues and solve complex design problems. Strong understanding of system-level power and thermal constraints, and how they interact with user experience Ability to define and analyze power/performance KPIs and drive architectural decisions based on data. Extensive experience in low-power design, including RTL development and System Verilog. Experience with hardware/firmware/software co-design for complex power management systems. Qualifications: Minimum Qualifications BS in electrical and computer engineering 10 years of experience working in CPU and SOC power management and thermal management architecture Preferred Qualifications Strong analytical and problem-solving skills demonstrated through leadership roles or team management. Effective collaboration skills to work across teams and influence cross-functional roadmaps. Passion for driving innovation and contributing to Intel's mission of delivering world-class technology solutions. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Texas, Austin Additional Locations: US, Oregon, Hillsboro Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gende ... (truncated, view full listing at source)