Performance & Reliability Engineer

Cerebras Systems
Sunnyvale, CA; Toronto, Ontario, CanadaPosted 7 April 2026

Job Description

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Role Join Cerebras as a Performance Reliability Engineer within our innovative Co-Design and Next Generation Team. Our groundbreaking CS-3 system has set new benchmarks in high-performance ML training and inference solutions. It leverages a dinner-plate sized chip with 44GB of on-chip memory to surpass traditional hardware capabilities. This role focuses on characterizing and optimizing the performance and reliability of state-of-the-art AI models running on Cerebras' breakthrough hardware. Responsibilities Characterize and enhance the performance and reliability of advanced ML hardware/software systems, with emphasis on reducing power and thermal fluctuations. Analyze ML workloads, software kernels, and hardware architecture for power and performance impacts, and synthesize high-level insights across these layers. Develop creative software solutions to improve reliability and performance, collaborating cross-functionally to deploy these solutions in production. Influence the design of Cerebras' next-generation AI architecture and software stack through rigorous workload analysis and computational efficiency optimization. Partner with ML engineers, researchers, and reliability specialists to understand model behavior and drive system-level improvements from a software perspective. Collaborate with teams in architecture, silicon, and research to advance our computational platforms and influence future system designs. Skills Qualifications BS, MS, or PhD in Computer Science, Electrical Engineering, or a related field. 3+ years of relevant experience in performance engineering, reliability, computer architecture, and/or software design. Proficiency in Python or other scripting languages. Experience with C/C++ and assembly programming. Demonstrated expertise with system-level performance and reliability optimization. Strong verbal and written communication skills. Nice to have: Hands-on experience with ML models, ML frameworks, and collective communication. Nice to have: Understanding of thermal management principles and power delivery for advanced semiconductors. Why Join Cerebras People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras: Build a breakthrough AI platform beyond the constraints of the GPU. Publish and open source their cutting-edge AI research. Work on one of the fastest AI supercomputers in the world. Enjoy job stability with startup vitality. Our simple, non-corporate work culture that respects individual beliefs. Read our blog: Five Reasons to Join Cerebras in 2026. Ap ... (truncated, view full listing at source)
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