Senior/Staff Engineer : Post Silicon- Bring Up

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. The Role: In this exciting role, you will be responsible for bring up and optimizations of Cerebras’s Wafer Scale Engine (WSE). Suitable candidate will have experience delivering end to end solutions working closely with teams across chip design, system performance, software development and productization. Responsibilities: On Wafer Scale Engines, develop and debug flows that embed well tested and deployable optimizations in production processes to reduce time and costs Work on refining AI Systems across H/W-S/W design constraints such as di/dt, V-F characterization space, current and temperature limits in relation to optimizations for performance. Develop/Enhance infrastructure to enable silicon for real world workload testing Develop self-checking metrics, as well as instrumentation for debug and coverage Work with the silicon architects/designers, performance engineers and software engineers to enhance performance of Wafer Scale Engines. Work across domains such as, Software, Design, Verification, Emulation Validation to refine and optimize performance and process. Work with CI/CD tools, git repositories, github, git actions/Jenkins, merge and release flows to streamline test and release. Skills Qualifications: BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS or equivalent work experience 7-10+ years of industry experience 3-5 years of experience in Pre-silicon Post Silicon ASIC hardware Good understanding of computer architecture and networking Excellent Coding in languages such as Python/Verilog/System Verilog and C Proficient in hardware/software codesign and layered architectures. Excellent debugging, analytical, and problem-solving skills Proficient in large scale testing and automation using pytest and python Good presentation skills to refine diverse information and put forth optimization strategies and results. Good interpersonal skills, ability desire to work as a standout colleague Proven track record of working cross-functionally learning fast and driving issues to closure Preferred: Previous work in AI-ML with 100+ CPU core communication fabric-based design. Familiarity with in-line testing and diagnostics using CPU memory and execution with self-checking. Knowledge of chip defect profiles and mitigation strategies across the hardware and software stack Familiarity in creating test and s/w infrastructure at large scale Working across global time zones Location: Sunnyvale, California. Bangalore, India Toronto, Canada The base salary range for this position is $175,000 to $275,000 annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications. Why Join Cerebras People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is un ... (truncated, view full listing at source)