CPU Verification Engineer

Intel
US, Texas, Austin$106k – $200kPosted 14 April 2026

Job Description

Job Details: Job Description: Join Intel's Silicon Engineering Group as a CPU Design Verification Engineer and play a critical role in shaping the next generation of high-performance, power-efficient processors. As part of the E-core CPU team, you will validate cutting-edge CPU architectures designed for industry-leading performance-per-watt that power everything from laptops and desktops to high-end gaming systems, micro-servers, 5G base stations, and AI/ML workloads. You'll collaborate with world-class CPU architects, RTL designers, and physical design teams to ensure designs meet rigorous functional, performance, and power goals. This is a high-impact opportunity to work on complex microarchitectural features, solve deep technical challenges, and influence products that reach billions of devices worldwide. If you're excited about seeing your ideas, go from whiteboard concepts to real silicon-and want to grow alongside some of the brightest minds in the industry-this is where you belong. Key Responsibilities: Perform functional verification of CPU logic to ensure alignment with architectural and microarchitectural specifications Work across pre-silicon, emulation, and post-silicon environments to validate design functionality and debug issues across the product lifecycle Develop and execute comprehensive verification plans for CPU and IP components Perform functional coverage analysis, identify verification gaps, and implement strategies to close them Build scalable verification environments, including UVM-based testbenches and functional coverage models Define and run system-level simulation models to validate functionality, power, and timing, and uncover bugs Identify, replicate, debug, root-cause, and resolve design issues and bug escapes in pre-silicon environments Implement corrective measures to address failing tests and improve design robustness Collaborate closely with CPU architects, RTL developers, and physical design teams on complex feature verification Maintain and enhance verification infrastructure, methodologies, and automation flows Develop scripts and automation tools for testing using Python, Perl, C/C, or similar languages to optimize verification workflows and improve throughput Leverage AI techniques and innovative approaches to enhance verification processes and improve test coverage, significantly reducing product life cycle and validation timelines Document test strategies and drive technical reviews with cross-functional stakeholders Contribute to the definition and refinement of CPU architecture and microarchitecture features Qualifications: Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related STEM field with 3 years of relevant experience, OR Master's degree with 2 years of experience, OR PhD with 0 years of experience Experience in computer architecture fundamentals, with emphasis on CPU microarchitecture Experience with hardware modeling languages such as Verilog, VHDL, or System Verilog, and industry-standard simulation tools (through coursework, projects, or industry experience) Experience in debugging and validation, including test development, coverage analysis, and root cause analysis Experience developing or working with UVM-based or similar verification environments Programming experience in at least one language such as C/C, Python, or Perl Preferred Qualifications Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related STEM field, with demonstrated experience in CPU design, verification, or architecture Knowledge of x86 architecture, Intel Architecture ISA, and assembly programming, with hands-on experience applying it to verification or design tasks Experience with pre-silicon and post-silicon CPU verification, debugging, and analysis, including identifying and closing coverage gaps Familiarity with software validation, including microcode, firmware, or ... (truncated, view full listing at source)
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