Technology Development Quality and Reliability Engineer
IntelUS, Oregon, Hillsboro$134k – $255kPosted 19 April 2026
Job Description
Job Details:
Job Description:
Join Intel and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So, join us and help us create the next generation of technologies that will shape the future for decades to come.
The successful candidate will be working in Technology Development Quality and Reliability Engineering group focusing on research and technology development. In this position, you will help ensure robustness of Intel's leading-edge technologies and products. This is done in collaboration with process development and design teams. Job duties include development of new devices and processes as well as working with design teams to implement innovative reliability solutions. Specifically, this position is responsible to develop solutions and design rules to mitigate plasma induced process charging.
The engineer will be responsible for but not limited to:
Design test structures, run experiments, analyze data from test structures during technology development phase. Responsibilities also include develop, document, and publish design rules to aid internal and foundry design teams.
Serve as a consultant to design teams to ensure Process charging and metal antenna risks are addressed in robust circuits.
The ideal candidate should exhibit the following behavioral traits:
Verbal and written communication skills.
Problem solving in a complex environment dealing with stakeholder.
Ability to work within a team environment with effective communications skills and able to cultivate new connections and working partnerships.
Ability to work independently and drive resolution to new challenges and proliferate those learnings to VF partners.
Take initiative to solve problems.
Demonstrated project management skillset.
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:
Master's degree in Electrical Engineering, Physics, Materials Science or related field with 3 years of experience in semiconductor device development, modelling or characterization.
Preferred Qualifications:
Ph.D. in Electrical Engineering, Physics, Materials Science or related field with 3 years experience in semiconductor device development, modelling, characterization or circuit design
Experience in process charging mitigation is preferred.
Experience in SOI (silicon on insulator) technology development is a plus.
Device physics and basic VLSI design/layout knowledge.
Experience in planning and guiding the creation of test structure layout on test chips.
Experience with semiconductor device characterization, fabrication, integration, modeling and simulation.
Experience in JMP software for data analysis
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the ... (truncated, view full listing at source)
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