EDA- CAD Engineer

Job Description The job opening is for a full-time Electronic Design Automation (EDA) CAD Engineer in the Design Group in Western Digital's research department. The role will be a part of a multi-functional team whose aim is to develop and eventually commercialize Western Digital's strategic radiation hardened memory technology.    The responsibilities for the role will include Flow & Methodology Development: Design, implement, and maintain robust CAD flows and methodologies for analog and mixed-signal IC design (spanning simulation, physical design, verification and familiarity with RTL/synthesis). Running and Debugging Physical Verification flows including DRC, LVS, ERC and Antenna Checks Automation & Scripting: Develop custom scripts and internal utilities to automate repetitive design tasks, improve tool interoperability, and maximize engineering efficiency. Tool Integration & Support: Install, configure, and integrate industry-standard EDA tools (Cadence, Synopsys, Siemens/Mentor Graphics) into our infrastructure. Provide technical support to the design teams. Performance Optimization: Monitor and optimize compute resource utilization, license usage, and disk space. Troubleshoot design flow bottlenecks, license issues, and tool crashes. Vendor Management : Act as the primary technical liaison with EDA tool vendors to resolve software bugs, evaluate new features, and manage license compliance. Environment Management: Maintain design data management (revision control) systems and ensure clean, reproducible workspace environments Coordination of a Split-Fab Design environment for WD PDKs (for Memory Array Layers) and a CMOS Foundry PDK (for Operational Circuitry) Development of EDA Tool Design Rules for WD’s Memory Array Layers Defining and executing the split-fab tape out flow Qualifications include Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Experience: Minimum 0-5+ years of experience in an EDA CAD engineering or design flow automation role. Analog or Mixed Signal EDA Tool Knowledge : Hands-on experience with industry-standard tools. Strong understanding of modern semiconductor manufacturing processes and physical design rules. Experience developing memory cell models for inclusion in simulation tool environment, such as Verilog-A Programming Skills: Strong proficiency in scripting languages such as Python, Tcl, Perl, or Shell scripting (bash/csh). Systems Familiarity: Strong working knowledge of Linux/Unix environments, compute grid/scheduler management (e.g., LSF, Slurm, Grid Engine), and version control systems (e.g., Git, Perforce). Salary Ranges:  145,800.00-194,400.00 WD is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the " Know Your Rights: Workplace Discrimination is Illegal ” poster. Our pay transparency policy is available  here . WD thrives on the power ... (truncated, view full listing at source)