Hardware Systems Engineering Technical Lead - Milpitas/San Jose, CA

The application window is expected to close on: 03/20/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The High-End Routing hardware team develops the groundbreaking routers deployed in Service Providers and Data Centers worldwide. We are inventors in our field, using powerful technologies to design a new class of innovative routers supporting the Internet for the Future. Join us and participate in this exciting journey towards the future of connectivity! You will work among engineers as a direct contributor, designing and operating our growing worldwide network infrastructure. You will collaborate multi-functionally with architects, developers, and vendors within Cisco throughout the product development life cycle, solving sophisticated problems along the way. Your Impact You are a hard-working individual, dedicated to designing innovative electronic systems. You have a strong technical foundation and are continuously eager to learn. You demonstrate strong analytical and problem-solving abilities, with the capability to identify and solve hardware issues during the design and testing phases. You understand the importance of adhering to industry standards in hardware design and can clearly articulate ideas, discuss design concepts, and collaborate with team members effectively. You will be designing the hardware for the Cisco 8000 series routers to deliver the best quality and best power efficiency using groundbreaking Serdes technology at the highest bit rates possible. Your responsibilities will span from hardware definition to design, and from qualification to final product release to our customers. Primary responsibilities: • Drive hardware product life cycle development including architecture, detailed design, bring up, debug, Hardware Qualification, Release to Manufacturing, sustaining support and field failure support • Use Cadence/Allegro to develop and collect schematics • Guide layout and routing phase of the design • Write hardware specs, develop test plans, bring up hardware with ASIC teams • Debug issues the lab using analyzers, scopes Minimum Qualifications • Bachelor's degree in Electrical Engineering or Computer Engineering and 8+ years of experience, or Master’s degree in Electrical Engineering or Computer Engineering and 6+ years of experience, or PhD in Electrical Engineering or Computer Engineering + 3 years in system level development • Experience with high speed design for Ethernet or PCIe • Experience collaborating with peer teams such as: Manufacturing, Software, Mechanical, or Signal Integrity • Expertise in Board Design using industry standard tools such as Concept, Allegro, or equivalent tools • Experience with lab bring up and hardware design validation of products Preferred Qualifications • Experience writing hardware functional specifications • Experience with High-Speed Network Interfaces (10G/25G/100G) • Experience with control interfaces such as PCIe, MDIO, SPI, I2C • Experience designing systems with DDR4/DDR5 DIMMs • Experience with tackling signal integrity issues and board mounted power design and distribution techniques • Experience working with programmable devices such as FPGAs, CPLD • Prior experience with shipping products Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to ma ... (truncated, view full listing at source)