Hardware Engineer (High-speed IO/Testing) (Onsite)
CiscoSan Jose, California, US$152k – $222kPosted 31 March 2026
Tech Stack
Job Description
The application window is expected to close on: 03/31/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This position requires that you commute to the San Jose, CA office 5 days a week. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry. Your Impact In this role, you will be developing cutting-edge next-generation high-speed interconnect for deployment in data centers around the world. You will lead the activities of supporting internal and external customers with all requests related to Silicon One high-speed interfaces, including the development of new features and bug fixes. Other responsibilities include: Develop and execute electrical characterization testing for high-speed interconnect devices Support characterization, validation, compliance, and system integration of Silicon One devices Work with ASIC, system, and signal integrity team to evaluate design tradeoffs, optimize design solutions, and review SI/PI designs Develop automation and analysis tools for lab measurements and data processing in Python and/or Matlab Drive methodology development, including best practices for Cisco’s high-speed solutions and platforms to handle different system cases You will work with the Design, Signal Integrity, Routing SW/HW, SDK, and Production and Assembly teams. Minimum Qualifications MSEE or Computer Engineering degree with 5+ years of lab and related experience, or BSEE or Computer Engineering degree with 7+ years of lab and related experience. 2+ years’ hands-on experience with high-speed interface systems and high-speed lab measurements: usage of RF components (RF cable, bias tee, DC block) and test equipment (sampling scope, real-time scope, PPG, BERT, VNA, electrical spectrum analyzer) Experience with high-speed interfaces and analog building blocks PLL, CDR, CTLE, DFE, FFE, and FEC Programming knowledge in Python and C/C++ Strong debugging skills Preferred Qualifications At least basic understanding of high-speed optical testing Strong documentation, problem-solving, and technical communication skills Experience working cross-functionally and collaborating with various technical teams MS in Electrical Engineering or Computer Engineering with 4 years lab experience Knowledge of IEEE 802.3 and OIF specifications Experience with Signal integrity, DSP, and communication systems You are a problem solver who loves to tackle new challenges and a self-starter who is highly motivated and thrives on innovative technology. You are a strong communicator in a team setting, enjoy working in a dynamic team environment, and are an out-of-the-box thinker. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see t ... (truncated, view full listing at source)
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