ASIC Engineer

The application window is expected to close on: 03/31/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms powering Cisco’s core Switching, Routing, and Wireless products. We design networking hardware for enterprises, service providers, the public sector, and nonprofit organizations worldwide. As part of the team behind Cisco Silicon One—the industry’s only unified silicon architecture spanning top-of-rack switches to web-scale data centers—you’ll help shape Cisco’s groundbreaking solutions by designing, developing, and testing some of the most advanced ASICs in the industry. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You’ll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips. Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco’s hardware platforms. You will: Architect, develop, and maintain block, cluster, and top-level Design Verification (DV) environment infrastructure Build DV environments from scratch for block and cluster levels Develop, implement, and enhance test plans and tests for block and cluster verification, using both constraint-random and directed stimulus Ensure comprehensive verification coverage through code and functional coverage implementation and review Qualify RTL design by running Gate Level Simulations on netlists Collaborate with designers, architects, and software teams to debug issues during post-silicon bring-up and integration Support design testing in emulation environments Minimum Qualifications Bachelor’s degree + 5 years of ASIC experience, or Master’s degree+ 3 years of ASIC experience, or PhD + 0 years of related experience Experience in System Verilog and UVM methodology Experience building reusable and scalable test benches from scratch Experience with scripting using Perl and/or Python Preferred Qualifications Experience with forwarding logic, parsers, or P4 Experience using emulation platforms such as Veloce, Palladium, Zebu, or HAPS Experience with formal verification tools (e.g., IEV or VC Formal) Experience in one or more protocols such as PCIe, CXL, Ethernet, RDMA, DDR, or TCP Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $152,500.00 to $219,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the ... (truncated, view full listing at source)