ASIC Design Verification Engineer

The application window is expected to close on: 04/14/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms powering Cisco’s core Switching, Routing, and Wireless products. We design networking hardware for enterprises, service providers, the public sector, and nonprofit organizations worldwide. As part of the team behind Cisco Silicon One(#CiscoSiliconOne) —the industry’s only unified silicon architecture spanning top-of-rack switches to web-scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco’s groundbreaking solutions by designing, developing, and testing some of the most advanced ASICs in the industry. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You’ll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips. Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco’s hardware platforms. You will: Participate in the ASIC design verification for Cisco high-end switching products. Perform end-to-end verification of design blocks and top-level Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis. Construct testbenches components like scoreboard, agents, sequencers, and monitors. Collaborate with the hardware, software designers, and vendors. Minimum Qualifications: Bachelor's degree in electrical/computer science/computer engineering/related degree and 5+ years of related experience or master's in electrical/computer science/computer engineering/related degree and 3+ years of related experience, or PhD in electrical/computer science/computer engineering/related degree + 1 year of related experience. Experience in System Verilog and UVM. Experience with ASIC design and verification processes, debugging, methodology, and tools. Experience verifying blocks/clusters/full chip level for ASIC. Hands on debugging experience. Preferred Qualifications: PCIe and AXI protocol knowledge Experience with Linux, C/C++, and/or Python/Perl. Experience in Networking. Experience with Formal verification. Experience with post-silicon lab bring-up Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $152,500.00 to $219,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locat ... (truncated, view full listing at source)